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NEMA®|dc

Up to twenty (x20) times more power efficient than systems with a conventional display controller!

 

NEMA® | dc is not just an ordinary display controller, it is a real “Swiss Army Knife”!

 
DESCRIPTION

NEMA® | dc is a powerful display controller which contains several smart tools and functionalities to compose multiple graphics and video layers by improving image quality and contributing significantly to the reduction of the SoC power consumption. NEMA® | dc supports powerful composition features, a wide range of display interfaces, and advanced proprietary frame-buffer compression technology.

The core is designed to lift the workload off the Graphics Processing Unit (GPU) or the host processor (CPU), in GPU-less systems, and minimize the memory bandwidth. Multiple layers can be clipped, positioned and composed on the final display by overlaying video, subtitles, graphics, cursor or application windows, with or without transparency.

Additional information

Download NEMA® | dc Product Brief
MARKETS & APPLICATIONS

NEMA® | dc is designed as a flexible backend of the graphics-video path working perfectly in SoCs with GPUs or in tandem with the host CPU in GPU-less systems.

 
 
NEMA® | dc-100
NEMA® | dc-200
NEMA® | dc-400
 
 
Resolution
Up to 1024x768
Up to 1024x768
Up to 1920x1080
 
 
Composition Layers
1
Up to 2
Up to 4
 
 
Compression

The possibility to choose from three different versions of NEMA® | dc makes it a perfect candidate to match the budget and suite applications spanning from high to mid-range smartphones (NEMA® | dc-400) down to battery-limited embedded systems with simpler graphics requirements (NEMA® | dc-100).

Display Resolution
Framebuffer Size (Kbytes)
 
Horizontal
Vertical
32-bit
16-bit
TSCTM 4
TSCTM 6
TSCTM 12/12A
 
 
Smartwatch
320
320
400
200
50
75
150
 
 
360p
480
360
675
337.5
84.375
126.56
253.12
 
 
VGA
640
480
1200
600
150
225
450
 
 
720p
1280
720
3600
1800
450
675
1350
 
 
1080p
1920
1080
8100
4050
1012.5
1518.75
3037.5

POWER SAVINGS

NEMA® | dc has three smart methods to reduce significantly the system power consumption:

  • Think Silicon Frame-buffer compression (TSCTM): A high quality lossy and 4/6/12bpp (bits-per-pixel) fixed rate scheme, which performs in real-time and requires minimal hardware. TSCTM yields into a reduction of framebuffer size/traffic by 60-90%, depending on the color depth. The reduction of graphics memory size due to TSCTM enables systems using only internal on-chip memory by eliminating external DDR memory.
  • Multi-layer Smart Surface Composer (MSSC): While composing on the-fly surfaces, NEMA® | dc lowers the system bandwidth by eliminating multiple memory read/write cycles and memory volume accesses, compared to a system where the GPU or CPU is entirely in charge of the composition process. MSSC yields into a reduction of system bus/memory load by 40-60%, depending on the number and the format of the surfaces.
  • Screen Region Update: On selected output interfaces it allows partial updating of modified screen regions and not of the entire framebuffer.

ARCHITECTURE

NEMA® | dc is flexible and configurable while compile-time allowing engineers to select the number of layers, functionality of composition modules and processing methods tailored for their requirements.

SOFTWARE SUPPORT

NEMA® | dc simplifies software integration and it supports multiple OS, such as FreeRTOS, Linux and Android. A fully documented bare metal library of primitive graphics functions is available for OS-less systems. The bare metal library, written in the form of an API, is portable (pure ANSI C with no dependencies) and comes together with application-notes describing how to program NEMA® | dc and enable its composition features.

PRE-Sales Tool: The software package comes together with NEMA® | dc-API and NEMA® PIX-Presso (non-commercial version), a utility software for converting images to/from formats suitable for low power embedded devices.

OS support
  • FreeRTOS
  • Bare metal Library (no OS)
  • Linux
  • Android
Graphics API Support
  • Bare-Metal Library in portable ANSI C
Software Emulators and Suites
  • NEMA® | dc-API
  • NEMA® PIX-Presso (non commercial version)
PERFORMANCE

The integration of NEMA® | dc allows a SoC to drive full UltraHD displays, while operating at extremely low frequency. NEMA® | dc can compose a typical case of a four (4) layer user interface, providing a smooth and seamless layer transition experience. Composition and all animations are performed solely by the NEMA® | dc core by moving, filtering and blending the multiple videos and graphics framebuffer layers.

NEMA® | dc accelerating Windowed Layers

All animations, blending/scaling/filtering operations and scene composition are done entirely by the NEMA® | dc running @90MHz, with Zero CPU or GPU utilization.

NEMA® | dc accelerating Android-like GUI

All animations, blending/scaling/filtering operations and scene composition of four layers are done entirely by the NEMA® | dc running @90MHz, with Zero CPU or GPU utilization.

FEATURES

CORE FEATURES

  • Programmable display resolutions up to 32Kx32K, including: VGA, XGA, HD, Full-HD, Quad Full-HD**, 4K**
  • Powerful composition
    - Alpha blending
    - Programmable size, offset & format per layer
    - Programmable stride/pitch enabling panning and clipping
  • Multiple input graphics or video layers
  • Selective update, multiple input graphics or video layers
  • Optional RGB to YUV(YCbCr) conversion
  • Per layer palette
  • Global or per layer Gamma correction
  • Configurable dithering 15/16/18-bits for better results on displays
  • Fixed cursor (16 x 16)
  • Horizontal and Vertical Mirroring
  • Framebuffer CRC
  • Support of 8-bit, 16-bit, 24-bit, 32-bit and compressed input color formats
  • Configurable output interfaces

** Please check system requirements

DISPLAY INTERFACES

  • MIPI DPI-2 (Display Pixel Interface) - Parallel RGB
  • MIPI DBI-Type B (Display Bus Interface)
  • Serial formats 3-, 4- beat and two phase serial 12 bit RGB
  • Programmable HSYNC, VSYNC, DE, pixel clock polarity
  • 3 - 4 Wire SPI (Serial Peripheral Interface) bus
  • Dual SPI (Dual Serial Peripheral Interface) bus
  • Quad SPI (Quad Serial Peripheral Interface) bus
  • Serial / Parallel MiP (Memory in Pixel) Interface

CONFIGURATION OPTIONS

  • DMA
    - Scanline based
  • Layer Overlay
    - Number of layers
    - Features per layer
  • Display Interfaces
  • Master Interface
    - AMBA AHB 32bit
    - AMBA AXI3/AXI4 32/64/128 bit
  • Slave Interface
    - AMBA AHB
    - AMBA AXI3/AXI4-Lite
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