2.5D Multi-Core Raster & Vector Graphics Processor for low-power SoCs with Microcontroller
NEMA® | pico VG brings high-quality vector and raster graphics to user interfaces in the silicon area and power-constrained microcontroller market (MCU). This GPU superstar is the perfect candidate to support entry-level IoT platforms, battery-driven wearables, and embedded devices.
SoCs for those applications, with a 32-bit MCU (ARM® M class, ARC® EM5D, RISC-V) are resource constrained and need a powerful yet efficient vector GPU to provide high-quality graphics and stay within the power budget.
A vast SDK with powerful software tools is helping developers to create performant and compelling graphical user interfaces (GUI) in a fraction of time and stay within the power budget by utilizing less than 5% of the CPU performance.
- Small to Mid-sized Displays (1,5" - 10")
- Wearables: Smart-/Fitness -/Health watches, Eyewear
- Mobility: e-Bike / Scooter
- Home Appliances-/ Control -/ Entertainment: Fridge, Washing Machine, Thermostat, Audio, Video
- Industrial: PoS / PoI Terminals
1 Average power consumption (std 400 x 400 watch face)
OVERVIEW
The NEMA® | pico VG Series is a scalable and flexible multi-core GPU IP platform that combines hardware-accelerated 2.5D raster and vector graphics in a single IP solution giving developers the freedom and flexibility to choose the best rendering technique based on the displayed graphics content. NEMA® | pico VG uses smart compression algorithms to efficiently manage the invaluable memory. Along with our NEMA® | pico VG hardware, an extension to NEMA® | gfx API called NEMA® | vg is delivered. This extension enables high-quality vector graphics rendering with very low (typically <5%) CPU utilization – up to 4x lower than its predecessor NEMA® | pico XL. With NEMA® | gfx, and NEMA® | vg APIs, applications will make raster graphics calls (e.g., blitting operations) or vector calls (e.g., shapes and font rendering), which will be handled transparently.
INTEGRATION / VERIFICATION
The NEMA® | pico VG GPU IP Platform is available in Verilog / SystemVerilog code and is easily integrated and verified. The silicon-proven NEMA® | pico VG ASIC reference designs, with millions of units already shipped to the market, have been evaluated in various process technologies and have been verified through extensive simulation and rigorous code coverage measurements. It is accompanied by a complete verification suite that compares reference images with rendered images.
SOFTWARE SUPPORT
NEMA® | pico VG is accompanied by a suite of standard and new tools to help with the development and optimization of our customers’ products.
The standard tools are:
- NEMA® | pix-presso (non-commercial version), a utility software for converting images to/from Think Silicon’s proprietary lossy compression formats (TSCTM4 or TSCTM6) suitable for low-power embedded devices, and
- NEMA® | gui-builder (non-commercial version), a graphical cross-platform software framework enabling rapid high-end Graphics User Interface (GUI) development on low-resource hardware.
The new tools included with NEMA® | pico VG are:
- An offline utility, embedded inside NEMA® | pix-presso, which converts files from Scalable Vector Graphics (SVG) format into a very compact internal custom binary format (TSVG). The TSVG file format can be executed very efficiently with a single call of the NEMA® | vg API, and
- An offline utility that converts the vector font file (TTF format) into a very compact custom binary file that can be executed very efficiently with a single print function call of the NEMA® | vg API. With this utility, the developer can choose a suitable font range, e.g., Greek, Latin, Asian, etc. The key reasons for choosing vector fonts over raster fonts are the ability to support multiple font resolutions without impacting the quality and enabling more efficient storage, especially for Asian fonts.
ARCHITECTURE
NEMA® | pico VG Series has been designed for graphics efficiency in ultra-compact silicon area. Its fixed-point data path and instruction set architecture (ISA) are tailored to GUIs acceleration and small display applications leading to substantial improvements in power consumption and silicon area. NEMA® | pico VG Series microarchitecture is based on a lean version of NEMA ISA and it combines hardware-level support for multi-threading, VLIW, and low-level vector processing in the most power-efficient way.
HARDWARE COMPONENTS
- Programmable Shader engine with a VLIW instruction set
- Command list based DMAs to minimize CPU overhead
- Primitive Rasterizer
- Texture Mapping Unit
- Blending Unit
- Display Controller (Optional)
DRAWING PRIMITIVES
- Pixel / Line / HLine / Vline drawing
- Filled rectangles
- Triangles (Gouraud Shaded)
- Quadrilateral
- Cubic Bezier (Cubic/SCubic)
- Quadratic Bezier (Quad/SQuad)
- Arcs
- Polygon
- Polyline
SHAPES
- Circular ring with round caps
- Ellipse
- Circle
- Rectangle
- Line
FILLING RULES
- Even/Odd
- Non-Zero (without AntiAliasing)
PAINT
- Solid Color
- Textures (e.g. RGBA8888, RGB565, Palette based (LUT), TSCTM4, TSCTM6, TSC6TMa, TSCTM12, TSCTM12A etc.)
- Linear Gradient with multiple stops
- Radial Gradient with multiple stops
- Conical Gradient with multiple stops
STROKING
- Variable stroke-width
- Bevel join style
IMAGE TRANSFORMATION
- Texture mapping
- Point sampling
- Bilinear filtering
- Blit support
- Rotation any angle
- Mirroring
- Stretch (independently on x and y axis)
- Source and/or destination color keying
- Format conversions on the fly
- 3D Perspective Correct Projections
TEXTURE WRAPPING
- Clamp
- Border (single color)
- Repeat
- Mirror
PATH TRANSFORMATIONS
- 3x3 matrix transformations
TEXT RENDERING SUPPORTS
- Bitmap antialiased (A1 / A2 / A4 / A8)
- Vector fonts – offline conversion from .TTF
- Font Kerning
- Unicode (UTF8)
- Text Alignment:
- Top/Bottom/Middle/Even
- Left/Right/Middle/Even
COLOR FORMATS
- 32-bit RGBA8888 / BGRA8888 / ABGR8888
- 24-bit RGB
- 16-bit RGBA5551 / RGB565
- 8-bit Α8/ L8 / RGB332
- 4-bit A4/L4
- 2-bit A2/L2
- 1-bit A1/L1
- YUV Read Only
- TSCTM
COMPRESSION SCHEMES (Optional)
- TSCTM4 (4 bits per pixel)
- TSCTM6 / TSCTM6a (6 bits per pixel w/o alpha)
- TSCTM12 / TSCTM12a (12 bits per pixel w/o alpha)
BLENDING SUPPORT
- Fully Programmable Alpha blending modes (source and destination)
- Source/Destination color keying
- Porter-Duff Blending
ANTI-ALIASING
- 8x MSAA per edge